Huawei Launches Advanced Tau Scaling Architecture To Shatter US Trade Restrictions
Huawei semiconductor chief He Tingbo introduced the Tau Scaling Law, a fundamental redesign of how chips improve over time, alongside the LogicFolding architecture debuting in fall 2026 Kirin chips, targeting 1.4nm-equivalent transistor density by 2031.
Moore’s Law, the principle that guided the semiconductor industry for decades by predicting transistor counts would double roughly every two years, is nearing its physical limits. On May 25, 2026, Huawei proposed an alternative.
At the 2026 IEEE ISCAS in Shanghai, He Tingbo, chair of Huawei’s Scientist Committee and president of its semiconductor business, unveiled the Tau Scaling Law, nicknamed “Her’s Law” by industry peers.
According to Huawei, the principle shifts semiconductor progress away from transistor shrinking toward reducing signal and data propagation delays across chips and systems. For Huawei, the approach is both a new performance model and a technical response to mounting geopolitical pressure since 2019, anchoring China’s tech self-sufficiency efforts to bypass Western tech blockades.
What the Tau Scaling Law Is and How It Is Different
Traditional chip advancement relied on one strategy: shrink transistors, fit more onto the same silicon area, and increase performance.
That model depends on advanced lithography machines that Washington has restricted from Chinese chipmakers through export controls targeting ASML, TSMC, and major semiconductor tool suppliers.
Even when specific exceptions occur, such as the U.S. granting TSMC annual chip tool access to China for legacy nodes, the embargo on cutting-edge hardware remains absolute.
As Reuters noted, Huawei cannot access EUV lithography used at the frontier nodes being developed by TSMC, Samsung, and Intel.
The Tau Scaling Law proposes a different path. Instead of shrinking transistors, Huawei focuses on reducing the time, represented by the Greek letter 𝜏, that signals take to move across transistors and chip architectures.
As Huawei confirms, the approach coordinates improvements across five layers: transistors, circuits, chip architecture, software, and system interconnects. The goal is to achieve performance and density gains without relying on restricted lithography tools.
He Tingbo said, “We believe that openness and collaboration are key to driving ongoing progress in the semiconductor industry. No single company can independently find all the answers along the path of semiconductor evolution.”
LogicFolding and the Fall 2026 Kirin Debut
The Tau Scaling Law is already being used in commercial chips. Huawei says it has designed and mass-produced 381 chips based on Tau Scaling principles over the past six years across smartphones and AI computing.
The next milestone arrives in fall 2026, when new Kirin chips become the first commercial products to use Huawei’s LogicFolding architecture.
As Reuters reported, LogicFolding abandons traditional circuit layouts to shorten signal paths, reducing the resistive and capacitive load that slows data movement inside chips. The approach boosts effective transistor density without requiring a smaller process node.
Huawei projects that by 2031, high-end Kirin chips developed under the Tau framework could achieve transistor density equivalent to a 14-angstrom, or 1.4nm, process.
Reuters predicted that 1.4nm is expected to remain near the global frontier of chipmaking later this decade, a target TSMC, Samsung, and Intel are pursuing through conventional lithographic scaling, while Huawei is pursuing a different engineering approach.
The Critical Caveat and Why It Still Matters
Every serious analysis of the Tau announcement includes one qualification: Huawei provided no independent performance data to verify its claims.
As analysts note, the key question remains whether Huawei can translate design targets into manufacturable silicon at scale, the gap that US export controls were designed to preserve amidst fierce global manufacturing competition.
Announcing a transistor density target and achieving it in mass-produced chips are different milestones. That caveat matters. But the broader significance of the IEEE keynote does not depend entirely on whether Huawei reaches the 2031 target on schedule.
The bigger story is that a company facing some of the world’s toughest technology sanctions has spent six years building a new chip design framework and rolling it out across hundreds of commercial chips.
Huawei is now showing that framework to the global semiconductor community at one of the industry’s top circuits conferences as a possible replacement for the industry’s foundational principle.
